Abstract: Aimed at the low-latency requirements for data processing in quantitative high-frequency trading, an ultra-low-latency market system is customized, which includes three functions of network communication, data decoding and data analysis, and is implemented on FPGA. Parallel optimization of each functional module was used to build a full pipeline architecture. The design of the memory architecture was optimized to increase the data transmission rate. The stream interface was used to optimize the data transmission between modules and reduce the data processing latency. Experimental results show that the maximum throughput rate on the Alveo U50 can reach 38.4 Gbit/s, the market processing delay is as low as 678 ns, and the fluctuation is stable within 10 ns. Compared with the software solution, the performance is improved by 12 times, the throughput rate is increased by 1.87 times, and the delay is stable.