RESEARCH AND DESIGN OF MULTICORE SCHEDULING MECHANISM IN MULTICORE STACK PROCESSOR

As one of the research hotspots in the field of Forth, multi-core stack processors have made some research progress, but multi-core stack processors face the problem of lacking efficient Forth system support. A multi-core scheduling mechanism is studied and designed for the characteristics of Forth multi-core stack processors. The multi-core scheduling algorithm of this multi-core scheduling mechanism used global scheduling, and the Forth task scheduling algorithm used variable time slice rotation scheduling algorithm and earliest deadline first (EDF) scheduling algorithm, focusing on solving the Forth task scheduling problem of multi-core stack processor platforms. Experiments show that the multi-core scheduling mechanism can run reliably on a multi-core stack processor based on FPGA implementation and operating at 100 MHz frequency to achieve correct scheduling of tasks, with a minimum response time of 0.5 ms for common tasks and a maximum average response of 9.36 μs for real-time tasks.